Unified framework to leverage utilize accumulated knowledge from program requirements and design to auto-generate test harnesses, manage and automate Verification & Validation (V&V).
Fully integrated framework to specify requirements, define test specifications, link tests with requirements, use formal methods, perform static analysis, generate test harnesses, execute test cases, post process results, study requirement coverage and manage the entire Verification & Validation (V&V) workflow for Systems Engineering.
Are you tired of putting requirements in various formats, writing thousands of test cases in spreadsheets, creating test harness models manually, integrating with test vector generation and code coverage tools, mapping test results to requirements and finally, developing new tools to automate the whole process?
Expert Test Bench is an integrated platform providing continuous solution addressing all these issues, helping to manage the entire workflow for easy and thorough Verification & Validation of Requirement Specifications.
Detailed testing of embedded systems involves defining unit tests for individual components, integration tests for the application, functional & non-functional tests, etc... and creation of appropriate test interfaces. Even small changes in implementation model/code can cause re-work of all the test cases and assembled test interfaces.
With our next generation technology, there is no need to maintain seperate test models. The test engineers can directly define the test cases, dynamically generate test harnesses from the actual controls in C or Simulink, update existing tests with changes in requirement/model and reuse them.
The controls algorithm development for legacy systems started with C/Fortran. Even for new systems development, the C language is preferred for simplicity reasons. But, along with low level CAN and other hardware drivers, it is not always easy to simulate them in desktop.
In Expert Test Bench, it is easy to build custom schedulers, configure the inputs, compile the C modules in isolation, calibrate the parameters and simulate with various in-built fixed and variable time step solvers. The stored output results can be directly plotted and analyzed along with report generation.
With more adaptation of Test Driven Development for Model based Systems Engineering (MBSE), comes the complexity of managing vast repository of knowledge, test artifacts and network of tools.
Expert Test Bench provides step-by-step approach managing all the phases of V process, starting with initial concept to final release and maintenance of systems. The transition between various phases are automated and made seamless through integration of knowledge and tools and the application of Expert Systems.
The entire workflow for Verification and Validation (V&V) of complex embedded systems can be defined and automated easily in our integrated test environment. Helps to save time and effort and thereby, release well-tested software to customers much early. Even more savings can be realized through reuse of test artifacts across engineering programs.
We can work with you to identify the cost savings along with Return on Investment from Expert Test Bench.
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Expert Test Bench has support for multiple operating systems and native platforms including MATLAB-Simulink and C. The test specifications are stored in a tool neutral representation along with platform specific information.
The Model Developers and Test Engineers can migrate existing tests, develop new tests, version-control, collabrate and share test specifications across the engineering team easily.
Formal definition of signals and parameters referred in requirement specifications and models. The attributes will include data type, dimension, physical unit, etc...
Data dictionary can be directly extracted from existing Simulink models, exported to and imported from Spreadsheets.
Common set of possible test vectors for signals and parameters defined in the data dictionary, shared across engineering projects.
Hierarchical definition of system requirements with textual descriptions, mathematical assumptions and constraints.
Requirement Specification can be exported to various formats including as HTML and Microsoft Word documents.
Facilty to link and reuse requirement specification from Requirement Management systems and Microsoft Office documents.
Integrated framework for specifying multiple test cases for Systems under Test which could be either one or more Simulink subsystems or set of C modules.
Test Specification along with requirement specification can be shared with team members and version controlled.
Detailed setup specifying the source code, models libraries, scripts and data files along with option to customize the project initialization process.
Various test artifacts in the Test Specification can be mapped as 'Satisfiable' by linked requirements in the Requirement Specification.
Simulation configuration including Start & Stop time, Solver and initial conditions can be customized according to the test case.
Engineers can customize various aspects of the test execution process and add callbacks for integration with platform specific toolboxes & external tools.
Numerous sources for providing the test inputs including from Test Vector Database, custom plots, Excel sheets and In-Vehicle data.
Automatic derivation of test vectors from knowledge specified in the data dictionary and associated requirements.
Easy way to specify verification and validation logic through requirements, mathematical constraints, scenarios, past and In-vehicle results.
Test cases for various Systems under Test can be simultaneously executed in the target platform and the results are aggregated for detailed analysis.
Automatic generation of test harness model/code from the test specification and no hazzle of maintaining seperate test harness mode/code.
Easy to read aggregated report for execution status for test cases and coverage reports for validation of system requirements.
Archived results from each test execution can be quickly plotted, analyzed, saved and customized for reports.
Test results can be compared with baseline & old results and analyzed for convergence with actual data from plant systems.
Faclity to export execution status, coverage Studies and plots to various report formats including as HTML and Microsoft Office documents.
Test case logic for the test modules are automatically generated, compiled with dependent libraries and executed in isolation. MIL, SIL and PIL testing processes are automated for faster V&V of ECU control algorithms directly in desktop, before deployment to the hardware.
Facility to provide both Discrete & Continous states, specify simulation time and choose various types of Built-In Fixed & Variable Step ODE Solvers for accurate and faster simulation without the need for external dependencies.
Entire source code and the module hierarchy for the controls development projects can be imported with code configurations and external dependencies.
Flexible scope for each test harness which could be either an unit C file or a module or a group of related modules or the entire application itself.
Easy workflow for building custom schedulers with options for specifying the sampling frequency and conditions for execution of various controller tasks
Support for standard compilers and customization of the compilation process, including specification of preprocessor configurations and linked libraries.
Test vectors are directly importable from spreadsheets containing actual plant data and parameters are calibratable for individual test cases.
Test Results are automatically logged for the executed test cases, stored in open formats for later debugging and automatically analyzed using in-house tools.
Simultaneously launchable as embedded Matlab and independent standalone applications. The user experience is same for both of these application modes.
Automatic generation of test harness model from the source model as per the test case specification and no hazzle of maintaining seperate models for testings.
Project search path, workspace initialization, model and data configuration can be specified and executed in order during the test process.
Progress testing of various aspects of the model is enabled by specifying the scope for testing from unit subsystem to the entire model.
Intelligent identifaction of inputs, outputs and parameters for the System under Test helping to easily specify test vectors and derive the V&V logic.
Automatic recognition of parameters from the test system as well as multiple options for initializing & calibrating them uniquely for individual test cases.
Provisions for debugging of generated test harness models in case the actual outputs are not matching the expected results.
Test execution can be easily customized and integrated with external tools including in-house test vector generation utilities and and analysis algorithms.
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